During operation of an integrated circuit (IC) such as a microprocessor, there may be local variations in temperature and in the power supply voltage across the IC die.
Locations in the IC which experience higher temperatures than other locations are sometimes referred to as “hot spots” and may present significant challenges to the system or systems provided to cool the IC during operation. The issue of hot spots may compound the already significant demands placed on cooling systems by the ever increasing operating rates and rates of power dissipation by microprocessors.
Moreover, the local increase in temperature at a hot spot may adversely affect the operating speed of components at the hot spot, potentially causing the IC to fail to meet the intended operating rate.
Also, hot spots may migrate from location to location on the IC die, as different applications are executed. This further complicates implementation of designs to minimize hot spots.
Local variations in the supply voltage may also adversely affect operation of an IC. The operating rate of components of the IC tends to be reduced by localized reductions in supply voltage, potentially leading to overall failure of the IC due to, e.g., failing race conditions.
During testing of an IC design, it would be desirable to obtain relatively detailed, and substantially real-time, maps of local variations in temperature and supply voltage, to aid in arriving at design solutions to mitigate and/or avoid the adverse consequences of such variations. However, conventional techniques for detecting temperature and supply voltage variations tend to be limited, expensive, time-consuming and/or unsatisfactory. For example, so-called Vcc sense pins on an IC package allow for detection of the local supply voltage level at a few locations on the IC die, but do not permit a detailed supply voltage map to be generated. Temperature maps may be generated based on simulations, which may not be accurate, or based on empirical data obtained by Infra-red Emission Microscopy (IREM). The latter technique, though accurate, is disadvantageous in that it is very time-consuming and involves destruction of the device under test (DUT).
Accordingly, improved techniques for mapping temperature and supply voltage variations on an IC die are needed.